Repository and Workflows for Accelerating Circuit Realization (RACE) is part of the DARPA CRAFT program, which seeks to develop new fast-track circuit-design methods, multiple sources for integrated circuit fabrication, and a technology repository delivered by RACE team, that will facilitate reuse of proven solutions.

RACE will enable researchers and design experts to expand the state-of-the art in ASIC design through novel cyberinfrastructure and workflow tools that accelerate every phase of discovery, creation, adoption, and use by linking and computing around a repository of user-generated data, including new tools, new IP blocks/libraries, new design flows, training modules, and experience-base documenting best practices to adopt (and pitfalls to avoid).

In particular, RACE will enhance the ability of engineers to drive development of new technologies with maximized re-usability of existing IP libraries and new design flows to dramatically reduce the time to the first successful tape-out for any ASIC design, while ensuring that the fabricated ASICs meet all functional and performance specification.


This project is funded by the Defense Advanced Research Projects Agency under award HR0011-16-C-0043.